In the past decades, integrated circuit technology has achieved remarkable developments, and the technology wherein the key size is 22 nanometers and beyond is the trend of the development of semiconductor integrated circuit technology. The gate electrode in the gate-last process does not have to endure the high-temperature annealing at about 1000° C., which is capable of improving the performance of devices by using a structure of high-k dielectric layer/metal gate, and is considered to be the mainstream process.
The gate-last process involves the problem of deposition of work function metal layers after the removal of dummy gates. At present, titanium-aluminum (TiAl) alloy thin film is a relatively commonly-used work function metal of nMOSFET. The groove formed after removing the dummy gate has the characteristic of large depth-to-width ratio. The conventional physical vapor deposition (PVD) method, bound by the drawback of poor step coverage ability of the thin film formed by this method and the presence of the phenomenon of overhang 1011 as shown in FIG. 1, has been very difficult to satisfy the application requirement for a key size less than 22 nanometers.
For the purpose of satisfying the application requirement for TiAl alloy thin films in small-size devices, i.e., to ensure good step coverage ability and filling, a best known solution is to prepare TiAl alloy thin films by using the atomic layer deposition (ALD) method. However, due to the limitation of the precursor, it is relatively difficult to obtain a TiAl alloy thin film by using the ALD method. In addition, the ALD method for growing pure metals in the prior art is typically aided with a plasma. Although plasma aids in the reaction of the precursor, it may also damage the substrate at the same time.